Principal 3DHI Packaging Technologist at Millipore Corporation in San Jose, California

Job Description:

Work Location: San Jose, California
Shift: No
Department: EL-CT-NR Neuromorphic Realization
Recruiter: Michele Lee Stabinsky



This information is for internals only. Please do not share outside of the organization.




Your Role:



As Principal Technologist - you'll bolster and spearhead the 3D Heterogenous Integration (3DHI) packaging, defining and driving its development and integration of 3D memory-accelerator stack architectures, integrating our groundbreaking 3D vertical memory chiplets. Your work will be crucial in defining and designing 3DHI packaging solutions while co-optimizing for requirements such as power, thermal and mechanical, and bringing our innovative product to our customers. Your ability to innovate, foster teamwork, tackle challenges head-on, and thrive in a collaborative environment will be essential to your success.



Your Tasks:

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  Lead with Vision: Craft and execute a comprehensive strategy for packaging integration and development that sets the stage for innovation


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  Be the Expert: As a domain expert in semiconductor packaging technology, 3DHI and integration, you'll tackle drivers, challenges, and mitigation strategies to enhance performance and reliability.


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  Thought and Technical Leadership: Develop and maintain rigorous technical standards for packaging integration, ensuring all solutions meet or exceed industry benchmarks for performance, reliability, and scalability.


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  Collaborate and Innovate: Work closely with internal system/chip architects and external teams to understand our product to system level KPIs and requirements vis a vis leading edge and emerging packaging trends, capabilities and offerings, innovate on deployable packaging solutions, and co-optimize these solutions for thermal, mechanical and electrical trade-offs.


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  Deliver Excellence: Uphold the highest standards of technical quality in package development, implementing robust quality control processes and rigorous testing methodologies.


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  Optimize for Success: Enhance packaging strategies, structures and solutions to boost performance, repeatability, reliability and yield for emerging memory-centric offerings.


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  Stay Ahead of the Curve: Be deeply familiar with emerging packaging considerations of 3DHI, chiplets, integration with SOCs, particularly for AI computing needs. Keep your finger on the pulse of industry trends, academic research and roadmaps in semiconductor package technology through conferences and forums.


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  Leverage Your Knowledge: Use your expertise and experience of packaging technology, materials, and electrical, thermal and mechanical criteria to differentiate and optimize packaging solutions for future manufacturing.


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  Be Our Advocate: Act as a passionate packaging technology ambassador, engaging with partners and customers to understand their technical challenges and roadmaps, while establishing credibility across the organization and with external collaborators.


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  Achieve Greatness Together: Collaborate with high-performance teams to reach ambitious project goals that make a significant business impact.

Who You Are:




Minimum Qualifications:

• MS degree in Chemical, Electrical Engineering, or Mechanical Engineering, Physics, Materials Science, or a related field


• 8+ years of professional experience in semiconductor packaging development for memories, chiplets, or related fields.

Preferred Qualifications:

• Ph.D. in Chemical, Electrical Engineering, or Mechanical Engineering, Physics, Materials Science, or a related field.


• In-depth understanding of packaging and memory technology, advanced 3DHI and Packaging, chiplets, and thermal, electrical and mechanical co-optimization of packaging for high performance applications.


• Demonstrated experience in applying rigorous engineering principles to solve complex packaging integration challenges.


• Expertise in thermal management techniques for high-performance computing systems.


• Strong understanding of signal integrity and power integrity challenges in advanced packaging designs.


• Proficiency in failure analysis techniques and reliability testing methodologies for semiconductor packages.


• Proficiency in advanced simulation and modeling tools for package design and analysis, and package-process-design interactions are a plus.


• Experience with statistical analysis and design of experiments (DOE) methodologies for package optimization.


• Ability to collaborate with system and chip architects to achieve system level key parameter indices (KPIs) for our disruptive memory solution.


• Strong ability to engage with partners and manage package technology needs on a technical level.


• A strategic thinker who can see the bigger picture and connect the dots.


• Published research or patents in advanced 3DHI and packaging technologies or neuro-inspired computing architectures.

Pay Range for this position: $163,400 - $245,000


Our ranges are derived from several sources, and largely reliant on relevant industry market data. Should we decide to make an offer, we will consider several factors, including but not limited to your location, skills, experience, career level, and other job-related factors. This role may offer the following benefits: medical, vision, and dental insurance; life insurance; disability insurance; a 401(k) matching program; paid time off; and paid holidays; among other employee benefits. This role may also be eligible for short-term or long-term incentive compensation, including, but not limited to, cash bonuses.


The Company is an Equal Employment Opportunity employer. No employee or applicant for employment will be discriminated against on the basis of race, color, religion, age, sex, sexual orientation, national origin, ancestry, disability, military or veteran status, genetic information, gender identity, transgender status, marital status, or any other classification protected by applicable federal, state, or local law. This policy of Equal Employment Opportunity applies to all policies and programs relating to recruitment and hiring, promotion, compensation, benefits, discipline, termination, and all other terms and conditions of employment. Any applicant or employee who believes they have been discriminated against by the Company or anyone acting on behalf of the Company must report any concerns to their Human Resources Business Partner, Legal, or Compliance immediately. The Company will not retaliate against any individual because they made a good faith report of discrimination. Apply Now