Job Description:

RESPONSIBILITIES:

Kforce's client, a growing and established Semiconductor Company is seeking a Senior NVM Memory Mixed Signal IC Design Engineer. We are working directly with the hiring manager on this search assignment. The Memory Design Engineer will be working with our Design team and will work on innovative memory products. Our client offers a competitive compensation package including base salary, profit sharing and stock/RSUs. This position is hybrid-remote (2 days in office & 3 days from home).

Responsibilities:

• Design of multiple analog circuit building blocks from scratch, such as sense amplifiers, write and wordline drivers, charge pumps, bandgaps, op-amps, voltage regulators, IO drivers & receivers, oscillators, power supply detectors, and current distribution networks


• Supervise layout for mixed signal analog layout best practices to achieve compact area


• Explore and develop memory array architecture options. Optimize for IDD, area, and speed


• Interact with Device engineering for bitcell design and new read/write circuit concepts


• Work with product and test engineers for test plan and reviewing lab test results to drive bug fixes and yield improvement


• Run design verification flows (e.g., fast-spice, electromigration, IR drop, aging, etc.) to verify design is ready for tape-out


• Document design simulation and verification towards formal design reviews


• Support layout designers and drive final layout through post-layout and top-level simulations to validate top-level integration

REQUIREMENTS:

• BS or MS degree in Electrical or Computer Engineering or Physics or similar field


• Minimum 4-7+ years of experience in any Non-Volatile (NVM) memory circuit design, such as EEPROM, EPROM, Flash, ROM, SSD, NOR flash memory chips or other NVM Memory IC designs


• Experience with the design of Non-volatile memory IC's (NVM) is required


• Proven track record of working Silicon in production


• Deep understanding of transistor operation, device physics, analog/mixed-signal design


• Techniques and trade-offs as applied to memory and mixed-signal IC design


• Knowledge of memory interface protocols, such as SPI and DDR is preferred


• Experience with CMOS and/or FinFET would be ideal


• Strong communication skill and a team player


• Commitment to our core values of Leadership, Innovation, Communication, Persistence, Enthusiasm, and Respect

The pay range is the lowest to highest compensation we reasonably in good faith believe we would pay at posting for this role. We may ultimately pay more or less than this range. Employee pay is based on factors like relevant education, qualifications, certifications, experience, skills, seniority, location, performance, union contract and business needs. This range may be modified in the future.

We offer comprehensive benefits including medical/dental/vision insurance, HSA, FSA, 401(k), and life, disability & ADD insurance to eligible employees. Salaried personnel receive paid time off. Hourly employees are not eligible for paid time off unless required by law. Hourly employees on a Service Contract Act project are eligible for paid sick leave.

Note: Pay is not considered compensation until it is earned, vested and determinable. The amount and availability of any compensation remains in Kforce's sole discretion unless
and until paid and may be modified in its discretion consistent with the law.

This job is not eligible for bonuses, incentives or commissions.

Kforce is an Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, pregnancy, sexual orientation, gender identity, national origin, age, protected veteran status, or disability status.

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