Meta is hiring ASIC Power Engineers within our Infrastructure organization to work on power/performance optimizations from SOC Architecture to System level. We are looking for individuals with experience in power architecture definition and power management for large complex disaggregated ASICs, with exposure to power modeling, developing flows around EDA tools, and low-power design to build efficient System on Chip (SoC) and IP for data center applications.
ASIC Engineer, Power Responsibilities:
Work with Architecture and Design teams to assess power/performance tradeoffs at design/arch/process-tech levels and drive for best-in-class solutions for Meta workloads
Define the power specification at system and module level for Idle, TDP, Typical use cases
Develop power modeling infrastructure in Python/C++
Work with or develop architectural simulators in order to model performance and power
Build power estimation flows at various levels of abstraction: C-model, RTL, Gate, Layout
Optimize design for low-power with the understanding of system level concepts Evaluation and Implementation of low-power design techniques at different levels of abstraction
Power characterization on silicon: idle, TDP, use case power & debug power issues on silicon
Partner with vendors to drive low-power requirements for SoC interfaces such as LPDDR, PCIe, etc.
Partner with EDA tool vendors to select and deploy the appropriate power estimation tools
Collaborate with internal HW/SW Co-design, Architecture, Design, DV, and Emulation teams for power flows, optimization and estimation
Minimum Qualifications:
Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.
10+ years of experience with power arch specification, modeling, and design with C++/Python or an equivalent high level language
Experience with EDA tools and scripting languages (Python, Tcl) used to build tools and flows for complex environments
Preferred Qualifications:
Experience with architectural performance and power models at SoC and system level
Low-power design techniques such as clock-gating, power-gating, Dynamic Voltage and Frequency Scaling(DVFS), AVS
Experience architecting systems for various design scales (IP blocks, SOC, multi-chip system) with an understanding of tradeoffs between performance and power
Post-silicon bring-up, debug and identify issues on emulator and RTL
Understanding of ASIC design process and knowledge of leakage and dynamic power, and impact of environment and manufacturing process on power
Experience managing multiple design releases and working with cross functional teams to support and debug power issues
Experience with communicating across functional internal teams and with vendors Knowledge of front-end and back-end ASIC tools
Experience with RTL design using SystemVerilog or other HDL
About Meta:
Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today-beyond the constraints of screens, the limits of distance, and even the rules of physics.
Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.
Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@fb.com.
$212,000/year to $291,000/year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.
